program,specificcodelibraries,resetandinterruptvectors,theresetroutineandusuallytheIAPandcommunicationroutines. Figure2:Flashmemoryorganization
UBCarea ProgrammemoryareaRemainswriteprotectedduringIAP WriteaccesspossibleforIAP Optionbytes Programmablebytes(1page)upto8Kbytes(in1pagesteps) areafrom64 LowdensityFlashprogrammemory(8Kbytes) DataEEPROM(128bytes) Read-outprotection(ROP) Theread-outprotectionblocksreadingandwritingfrom/totheFlashprogrammemoryandthedataEEPROMinICPmode(anddebugmode).Oncetheread-outprotectionisactivated,anyattempttotoggleitsstatustriggersaglobaleraseoftheprogrammemory.Evenifnoprotectioncanbeconsideredastotallyunbreakable,thefeatureprovidesaveryhighlevelofprotectionforageneralpurposemicrocontroller. Clockcontroller 4.5Theclockcontrollerdistributesthesystemclock(fMASTER)comingfromdifferentoscillatorstothecoreandtheperipherals.Italsomanagesclockgatingforlowpowermodesandensuresclockrobustness. Features • Clockprescaler:TogetthebestcompromisebetweenspeedandcurrentconsumptiontheclockfrequencytotheCPUandperipheralscanbeadjustedbyaprogrammableprescaler. •Safe clockswitching:Clocksourcescanbechangedsafelyontheflyinrunmodethroughaconfigurationregister.Theclocksignalisnotswitcheduntilthenewclocksourceisready.Thedesignguaranteesglitch-freeswitching. •Clock management:Toreducepowerconsumption,theclockcontrollercanstoptheclocktothecore,individualperipheralsormemory. •Master clock
sources:Fourdifferent
clocksourcescanbeused
todrivethemasterclock: -1-16MHzhigh-speedexternalcrystal(HSE) -Upto16MHzhigh-speeduser-externalclock(HSEuser-ext)-16MHzhigh-speedinternalRCoscillator(HSI)-128kHzlow-speedinternalRC(LSI) |
